The Apollo Saturn V LVDC Project
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on this page:
(December 2010 - July, 2014)
LVDC Project Updates
Dave Jones Tests the Saturn V LVDC Components
Apollo Saturn V LVDC Board Teardown, Part 3
Apollo Saturn V LVDC Board Teardown, Part 2
The Apollo Saturn V LVDC Project Part 1
Cracking the Code of the Apollo Saturn V LVDC Logic Devices
X-ray Analysis of the Apollo Saturn V LVDC Circuit Board
The Apollo Saturn V Launch Vehicle Digital Computer (LVDC) Circuit Board
As a result of my X-ray analysis of my own LVDC board in February 2013, a viewer donated another LVDC page assembly board to me that had been exposed to the elements in a salvage yard for over 40 years. They sent this priceless artifact for the specific purpose that it be disassembled and destructively reverse engineered down to the component level, so that once and for all the real technology beneath the surface could be understood, that could explain how the Apollo Launch Vehicle Digital Computer really worked.
And you can get a chance to be a part of this too!
This genuine LVDC board does not belong to me, or to any one person - It belongs to all of us. When I complete my initial investigation, I will be passing along this Apollo Saturn V LVDC board to another engineer... Who must then in turn must pass it on to another engineer.... and so forth... in order that this artifact will forever remain in our community, and that we may all have a chance to share and discover this piece of history for ourselves.
This is The Apollo Saturn V LVDC Project!
- LVDC Project Updates -
Dave Jones Tests the Saturn
V LVDC Components
(July 7, 2014)
Dave Jones at EEVBlog receives
the LVDC page assembly board!
(December 26, 2013)
Now I will pass the board along to another engineer in our community, and they will add their skills to deconstructing this relic, and perhaps revealing more of its secrets. To be continued!
Chip type #321 was the first
to come off the LVDC board, and I found that the coating on the underside
which was covering the resistive elements was in fact a thin rubbery coating
of some kind of silicone. I successfully removed the coating by gently
using a small screwdriver to distress the silicone, then brushed it off
of the ceramic wafer with a medium bristle toothbrush. Using my DMM
I found the values to be very precise, and the mechanically trimmed deposited
film resistors are indeed very accurate in value.
My first attempt to open
one of these device packages was not elegant - I broke the thin ceramic
top off of #321 in pieces, which revealed a pink putty-like silicone fill.
Removing the potting I found
that the package was empty - no traces, no semiconductors. It seems
that #321 is simply two resistors, nothing more.
This is the cleaned interior
of a type #322 package -
I used a sharp chisel to
open each package by prying off the cover.
Inside each device package
was a pink silicone based putty that filled the cavity.
I carefully picked away the
filling to reveal the circuitry inside, but as it turned out my light touch
was not light enough. I accidentally dislodged many of the semiconductors
from their mounts in the process.
Missing transistors.... Doh!
I found them in the potting I pulled out later. Those traces are
wide, but the mounting points on the semiconductors are microscopically
small, just a few mils across at best. Not much surface area for
the solder joints.
Resistors on the underside
of the AB type device package - I damaged the one on the far right while
taking the silicone coating off. This is much harder than it seemed
to remove the potting without damaging the electronics.
are very small - here a normal pencil point is placed in view for scale.
Close up of a transistor
I inadvertently snapped off:
When chipping off the top
cap of one of the device packages I dislodged a wafer slightly, and accidentally
discovered that the leads on these logic device packages were actually
held by spring tension to deposited metallic contacts on the bottom and
top sides of the ceramic base wafer. The leads are not soldered to
the devices, but instead each making purely mechanical contact to the base
wafer. A conductive medium might be present in the clip part, but
that should get further investigation by another engineer in the project.
Another great reason why these page assembly boards were so very heavily
conformal coated for flight - not just because of the liquid cooling throughout
the LVDC, but it would also have been necessary to prevent the devices
moving out of place due to the extreme vibration of the Saturn V in flight.
At long last the first installment of my teardown of the donated Saturn V LVDC logic page assembly board. This video is a long one, so probably for hardcore NASA nuts only - many surprises and more to follow as I delve deeper into this priceless piece of space history.
I spent many late nights in squinty-eyed examination of the X-rays we took of my LVDC board, and plowed through hundreds of pages of publicly available documents about the IBM System/360 looking for clues that would help unravel the convoluted maze of puzzle pieces and reveal the nature of the LVDC logic devices. IBM developed the System/360 and the LVDC in tandem, and I expected that there would be much crossover of the two systems. In the end I found that these systems had surprisingly little in common in their gate designs, and some surprising facts emerged.
IBM introduced the System/360 in 1964 with much fanfare. They proudly flaunted the new DTL solid state logic devices which they called Solid Logic Technology (SLT) and published photos and descriptions of their new "Hybrid" devices; ceramic based micro packages with thick film deposited resistors and semiconductor chips (both transistors and dual diodes) called "Flat Chips" which were solder ball reflowed upside down directly onto tiny tinned pads going to lead traces. The DTL gates contained one common anode dual diode chip, a dual series diode chip, and a transistor. Rather than having a full circuit completed in the traces inside of the device, the circuit was divided into modular components, and depending on which pins were selected or jumped to which other pins, could configure the DTL device to be a NAND or a NOR, and to have a choice of possible output configurations.
My first approach was to try to translate this System/360 DTL technology to what could be seen in the LVDC, but despite weeks of postulating dozens of possibilities there were no complete fits with what was visible in the X-rays.
One thing that made the LVDC logic devices so hard to figure out was that one of my initial assumptions about the LVDC PCB was wrong - the board's device mounting locations were not universal as I had thought. In fact, each mounting location was dedicated and wired for a specific type of device package, though there seems to be no interconnecting between gates within the board, again suggesting that the gate array would be created within the backplane wiring. Also, the pinouts on the two types of logic devices on my board were not the same, and there was no universal Vcc pin, or ground pin. For example, an input pin on one device would be a jumper point on another. The whole LVDC system may have operated on many different types of gate packages, but my board contains only AND gates and NOT (inverter) gates.
The X-rays revealed that jumpers inside of the PCB layers were critical to completing the gate circuits, and these critical connections seem to have been intentionally designed out of the logic devices themselves. But why? The answer is most likely that this technology was highly classified at the time, and probably exclusive for military or government use only. The complete absence of any documentation about the LVDC hardware would seem to corroborate this assumption. In the 1960's IBM made the computers for every branch of the military, and this technology was the future - for use in ICBM's, guidance, and satellites. They would have expected some espionage - that some of these logic devices would fall into enemy hands - the Soviets, or the competition. But if you were to have possession of these logic device packages and broke them open you would not see anything special in them - just semiconductors and resistors in broken circuits. Without the primer of jumper connections needed to make the device active the secrets of how it operated would be safe.
Another big difference in this applied DTL System/360 vs. LVDC technology is the scale. The individual System/360 SLT device packages were much larger (about 12mm square) than the LVDC device packages (5mm X 7mm) and the SLT film deposited resistors were also larger and deposited on the top side of the ceramic base along with the semiconductor traces. The LVDC device packages had the film resistors deposited on the bottom side of the ceramic base, connected in circuit to certain pins with the top side, making the total package much more compact. One thing about deposited thick film resistors is their inherent sloppiness for value - up to ±30-40% variation in tolerance - but what was revealed in the SLT devices was that the film was deposited between two conductive rails set some distance apart, with an unusual shape to the resistors which seemed to suggested that the resistor film had been either mechanically or chemically trimmed after being deposited to tune its specific resistance. There must have been a process to do this accurizing on a smaller scale, since the resistive elements in the LVDC devices are very small.
My disclaimer about this project is that without using destructive methods it is impossible to know exactly how these LVDC devices were constructed or how they operate, and not much more can be deciphered through what was visible in the X-rays alone.
My preliminary analysis of the Saturn LVDC board:
- The X-ray image is negative, so white elements are completely blocking the X-rays while black parts show no obstruction. Most of the board is grey due to the continuous ground plane and overlapping traces, and white spots mostly indicate lead solder.
- Each logic device package contains 4 semiconductors. The ceramic wafer bases of each logic package have conductive traces deposited on both the top and bottom sides, and the semiconductors (called Flat Chips) are surface mounted with solder balls by reflowing to these traces face down on the top side of the wafer (it has been noted that the later IBM 360 logic devices were made in this manner- see link below). The small white square shapes you see arranged in threes are the solder pads connecting each semiconductor to the traces.
- The board has a continuous ground plane layer, and the only openings are around the vias, which you can see as a black ring around all of the via pads that show a clearing through all layers.
- The 35 mounting positions on the board for the logic packages appear to be identical.
- The logic packages do not appear to contain capacitors.
- This board has a lot of layers!
- The bone in my thumb is apparently not broken. :)
Xrays provided by the Daniel P. Thomas, DMD
This is a picture of the Apollo Saturn V LVDC board that is in my collection. It was a spare that would have been placed into one of the later Apollo moon rockets. It is a marvel of its time and demonstrates so many firsts that it stands as a representation of the tremendous leaps that technology took for the Apollo program. It is the first example of applied microchip technology [update- individual transistors and diodes wired into gates on one ceramic chip], surface mount components, multi-plane circuit board construction [update- 12 layers with full ground plane], plated through-hole vias, and modular logic in one system. The relationship between this LVDC IU board and all modern computers is staggeringly close by electronics technology perspectives, and it is a monumental leap past anything that had ever existed before it. Digital watches, pocket calculators, home computers, and all facets of modern electronics sprung out of these technologies, developed solely for the purpose of flying this unheard of machine, the fantastic Saturn V Moon Rocket.
The custom made integrated circuit chips were apparently made in two types (need to confirm this), to contain either two AND gates or inverters each [update- the LVDC may have contained several types of logic devices but my board (pictured) contains only two types of logic devices, AND and NOT (inverter)], with up to 35 IC's per board, and banks of these individual hard wired logic boards made up the heart of the LVDC. I had read long ago that it was thought that AND logic was chosen because it was inherently more stable to produce. Reliability was a very big consideration in the design of the IU. The IU also ran on core memory, again chosen for its proven reliability.
The LVDC was manufactured under contract by IBM and was housed in a ring at the top of the Saturn V rocket, behind the CSM. The Saturn V was controlled and monitored on the pad by ground operators via an umbilical, but once the ignition sequence start was initiated the IU took over. From that point to orbit all guidance, attitude, control, engine adjustment, telemetry, staging, and all other onboard operations were controlled entirely by the IU. Because of the LVDC and IU the mighty Saturn V was the most sophisticated fully autonomous system then constructed. The core memory program it ran on could not be programmed on the fly, it had to be set on the ground, so the flight path was predetermined. As such the IU was also responsible for any course correction and compensating for any malfunction, as it did on Apollo 13 when a center engine failed. During ascent the only human control was the option to abort, and until the final staging when the CSM was free in orbit it was the IU that called all the shots.
Whenever I look at this magnificent artifact of our Apollo program sitting in my own collection I am always awestruck. It recalls an excerpt from one of my favorite poems, Ode, written by Arthur O'Shaughnessy in 1874 –
WE are the music-makers,
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